# Design Documentation for sg13g2_or2_1

## Substrate
```
  012345678
4 SSSSSSSSS
3 NNNNNNNNN
2 NNNNNNNNN
1 NNNNNNNNN
0 NNNNNNNNN
9 NNNNNNNNN
8 NNNNNNNNN
7 NNNNNNNNN
6 SSSSSSSSS
5 SSSSSSSSS
4 SSSSSSSSS
3 SSSSSSSSS
2 SSSSSSSSS
1 SSSSSSSSS
0 NNNNNNNNN
```
Legend: N=N-Well, S=Substrate

## Active
```
  012345678
4 ppppppppp
3
2  ppppppp
1  ppppppp
0  ppppppp
9      ppp
8
7
6
5
4      nnn
3  nnnnnnn
2  nnnnnnn
1
0 nnnnnnnnn
```
Legend: n=NMOS Active, p=PMOS Active

## Polysilicon
```
  012345678
4
3   G G G
2   G G G
1   G G G
0   G G G
9   G G G
8   G G G
7   G G G
6   G G G
5   G G G
4   G G G
3   G G G
2   G G G
1   G G G
0
```
Legend: G=Polysilicon

## Metal 1
```
  012345678
4 &+&+&+&+&
3      +
2  c   & o
1  C   + O
0  c   & o
9  C I + O
8  CIi   O
7  C II  O
6  C i c O
5  C   CCO
4  CCCCC o
3    C   O
2  _ c _ o
1  -   -
0 _-_-_-_-_
```
Legend: +/&=VDD, -/_=VSS, I/i=Metal 1 Input, O/o=Metal 1 Output, c/i/o/&/_=Contacted metal (lowercase)

## Connectivity Matrix

| Silicon | VDD | VSS | Internal1 | Output1 |
| --- | --- | --- | --- | --- |
| NMOS1 |   | X |   |   |
| NMOS2 |   | X | X | X |
| PMOS1 | X |   | X | X |
| PMOS2 | X |   |   |   |
| Poly1 |   |   |   |   |
| Poly2 |   |   |   |   |
| Poly3 |   |   |   |   |

## Silicon Neighbourhood

| Silicon | Poly1 | Poly2 | Poly3 |
| --- | --- | --- | --- |
| NMOS1 | N | N | N |
| NMOS2 | O | O | O |
| PMOS1 | O | O | O |
| PMOS2 | S | S | S |